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Journal Articles

Effect of Design Parameters on Thermomechanical Stress in Silicon of Through-Silicon Via

Joo-Sun Hwang, Seung-Ho Seo, Won-Jun Lee

J. Electron. Packag. September 2016, 138(3): 031006.

Paper No: EP-15-1054

https://doi.org/10.1115/1.4033923

Published Online: June 28, 2016

View Article titled, Effect of Design Parameters on Thermomechanical Stress in Silicon of Through-Silicon Via

Topics: Copper, Design, Silicon, Stress, Thermomechanics, Stress concentration, Annealing, Yield stress

Journal Articles

Thermal Stresses of Through Silicon Vias and Si Chips in Three Dimensional System in Package

Takahiro Kinoshita, Takashi Kawakami, Tatsuhiro Hori, Keiji Matsumoto, Sayuri Kohara, Yasumitsu Orii, Fumiaki Yamada, Morihiro Kada

J. Electron. Packag. June 2012, 134(2): 020903.

https://doi.org/10.1115/1.4006515

Published Online: June 11, 2012

View Article titled, Thermal Stresses of Through Silicon Vias and Si Chips in Three Dimensional System in Package

Topics: Finite element methods, Silicon, Silicon chips, Simulation, Stress, System-in-package, Thermal stresses, Temperature, Stress concentration

Journal Articles

Evaluation of Joining Strength of Silicon-Resin Interface at a Vertex in a Three-Dimensional Joint Structure

Hideo Koguchi, Kazuhisa Hoshi

J. Electron. Packag. June 2012, 134(2): 020902.

https://doi.org/10.1115/1.4006139

Published Online: June 11, 2012

View Article titled, Evaluation of Joining Strength of Silicon-Resin Interface at a Vertex in a Three-Dimensional Joint Structure

Topics: Bonding, Boundary element methods, Delamination, Resins, Stress, Stress singularity, Silicon, Joining, Stress concentration

Journal Articles

The Thermoelastic Analysis of Chip-Substrate System

Linzhi Wu

J. Electron. Packag. September 2004, 126(3): 325–332.

https://doi.org/10.1115/1.1772413

Published Online: October 6, 2004

View Article titled, The Thermoelastic Analysis of Chip-Substrate System

Topics: Fourier series, Heat conduction, Integrated circuits, Stress, Temperature, Thermal stresses, Thermoelasticity, Stress concentration, Reliability, Heat

Journal Articles

Characterization of Substrate Materials for System-in-a-Package Applications

Liu Chen, Anders S. G. Andræ, Gang Zou, Johan Liu

J. Electron. Packag. June 2004, 126(2): 195–201.

https://doi.org/10.1115/1.1648057

Published Online: July 8, 2004

View Article titled, Characterization of Substrate Materials for System-in-a-Package Applications

Topics: Ceramics, Cooling, Density, Epoxy resins, Finite element methods, Manufacturing, Microwaves, Reliability, System-in-package, Thermal expansion

Journal Articles

Failure Analysis of Full Delamination on the Stacked Die Leaded Packages

T. Y. Lin, Z. P. Xiong, Y. F. Yao, Lane Tok, Z. Y. Yu, Budi Njoman, K. H. Chua, Y. Y. Ma

J. Electron. Packag. September 2003, 125(3): 392–399.

https://doi.org/10.1115/1.1602704

Published Online: September 17, 2003

View Article titled, Failure Analysis of Full Delamination on the Stacked Die Leaded Packages

Topics: Delamination, Finite element analysis, Stress concentration, Failure analysis, Adhesion

Journal Articles

Quantitative Mechanism of Significant Benefits of Underfill in Flip-Chip Assemblies

Xia Cai, Liu Chen, Qun Zhang, Bulu Xu, Weidong Huang, Xiaoming Xie, Zhaonian Cheng

J. Electron. Packag. March 2003, 125(1): 84–92.

https://doi.org/10.1115/1.1533802

Published Online: March 14, 2003

View Article titled, Quantitative Mechanism of Significant Benefits of Underfill in Flip-Chip Assemblies

Topics: Finite element analysis, Flip-chip assemblies, Simulation, Solder joints, Solders, Stress, Deformation, Cycles, Flip-chip packages, Thermal expansion

Journal Articles

Strength Evaluation of Notch Structure for Semiconductor Encapsulant Resin

Noriyasu Kawamura, Takashi Kawakami, Kikuo Kishimoto, Masaki Omiya, Toshikazu Shibuya

J. Electron. Packag. December 2002, 124(4): 323–327.

https://doi.org/10.1115/1.1501304

Published Online: December 12, 2002

View Article titled, Strength Evaluation of Notch Structure for Semiconductor Encapsulant Resin

Topics: Fracture (Materials), Fracture (Process), Fracture toughness, Resins, Semiconductors (Materials), Stress, Temperature, Stress concentration, Finite element analysis, Delamination

Journal Articles

Experimental Investigation of Residual Stresses in Layered Materials Using Moire´ Interferometry

Keith B. Bowman, David H. Mollenhauer

J. Electron. Packag. December 2002, 124(4): 340–344.

https://doi.org/10.1115/1.1497627

Published Online: December 12, 2002

View Article titled, Experimental Investigation of Residual Stresses in Layered Materials Using Moire´ Interferometry

Topics: Interferometry, Polymers, Residual stresses, Stress, Laminates, Temperature, Displacement, Stress concentration

Journal Articles

Three-Dimensional Versus Two-Dimensional Finite Element Modeling of Flip-Chip Packages

Q. Yao, J. Qu

J. Electron. Packag. September 1999, 121(3): 196–201.

https://doi.org/10.1115/1.2792684

Published Online: September 1, 1999

View Article titled, Three-Dimensional Versus Two-Dimensional Finite Element Modeling of Flip-Chip Packages

Topics: Finite element analysis, Flip-chip packages, Modeling, Deflection, Flip-chip assemblies, Printed circuit boards, Stress, Design, Multi-chip modules, Size effect

Journal Articles

Interior Stress for Axisymmetric Abrasive Indentation in the Free Abrasive Machining Process: Slicing Silicon Wafers With Modern Wiresaw

F. Yang, I. Kao

J. Electron. Packag. September 1999, 121(3): 191–195.

https://doi.org/10.1115/1.2792683

Published Online: September 1, 1999

View Article titled, Interior Stress for Axisymmetric Abrasive Indentation in the Free Abrasive Machining Process: Slicing Silicon Wafers With Modern Wiresaw

Topics: Abrasive machining, Semiconductor wafers, Stress, Abrasives, Manufacturing, Pressure, Shear stress, Slurries, Wire, Cutting

Journal Articles

Mesh Sensitivity and FEA for Multi-Layered Electronic Packaging

Cemal Basaran, Assoc. Prof. and Director,, Ying Zhao, Senior Reliability Engineer,

J. Electron. Packag. September 2001, 123(3): 218–224.

https://doi.org/10.1115/1.1362674

Published Online: July 6, 1999

View Article titled, Mesh Sensitivity and FEA for Multi-Layered Electronic Packaging

Topics: Adhesives, Damage, Elastic analysis, Finite element analysis, Stress, Stress concentration, Electronic packaging, Shear stress, Stress singularity

Journal Articles

Package-to-Board Attach Reliability — Methodology and Case Study on OMPAC Package

B. Nagaraj, M. Mahalingam

J. Electron. Packag. September 1998, 120(3): 290–295.

https://doi.org/10.1115/1.2792635

Published Online: September 1, 1998

View Article titled, Package-to-Board Attach Reliability — Methodology and Case Study on OMPAC Package

Topics: Reliability, Temperature, Solders, Cycles, Finite element methods, Simulation, Creep, Failure, Simulation results, Ball-Grid-Array packaging

Journal Articles

Modeling Stresses of Contacts in Wire Saw Slicing of Polycrystalline and Crystalline Ingots: Application to Silicon Wafer Production

J. Li, I. Kao, V. Prasad

J. Electron. Packag. June 1998, 120(2): 123–128.

https://doi.org/10.1115/1.2792595

Published Online: June 1, 1998

View Article titled, Modeling Stresses of Contacts in Wire Saw Slicing of Polycrystalline and Crystalline Ingots: Application to Silicon Wafer Production

Topics: Modeling, Semiconductor wafers, Stress, Wire, Particulate matter, Cutting, Silicon, Abrasives, Fracture (Materials), Slurries

Journal Articles

A Finite-Element and Experimental Analysis of Stress Distribution in Various Shear Tests for Solder Joints

T. Reinikainen, M. Poech, M. Krumm, J. Kivilahti

J. Electron. Packag. March 1998, 120(1): 106–113.

https://doi.org/10.1115/1.2792277

Published Online: March 1, 1998

View Article titled, A Finite-Element and Experimental Analysis of Stress Distribution in Various Shear Tests for Solder Joints

Topics: Experimental analysis, Finite element analysis, Shear (Mechanics), Solder joints, Stress concentration, Creep, Simulation results, Stress, Alloys, Deformation

Journal Articles

Towards an Integrated Approach for Analysis and Design of Wafer Slicing by a Wire Saw

R. K. Sahoo, V. Prasad, I. Kao, J. Talbott, K. P. Gupta

J. Electron. Packag. March 1998, 120(1): 35–40.

https://doi.org/10.1115/1.2792283

Published Online: March 1, 1998

View Article titled, Towards an Integrated Approach for Analysis and Design of Wafer Slicing by a Wire Saw

Topics: Design, Semiconductor wafers, Wire, Cutting, Algorithms, Feedback, Finishes, Finite element methods, Fracture (Materials), Fracture (Process)

Journal Articles

Residual Stress Analysis of Bimaterial Strips Under Multiple Thermal Loading

J. W. Tierney, J. W. Eischen

J. Electron. Packag. December 1997, 119(4): 281–287.

https://doi.org/10.1115/1.2792250

Published Online: December 1, 1997

View Article titled, Residual Stress Analysis of Bimaterial Strips Under Multiple Thermal Loading

Topics: Algebra, Equilibrium (Physics), Finite element analysis, Microelectronic devices, Stress, Stress analysis (Engineering), Stress concentration, Strips

Journal Articles

Warpage and Interfacial Stress Distribution in a Single-Level Integrated Module (SLIM)

R. C. Dunne, S. K. Sitaraman

J. Electron. Packag. September 1997, 119(3): 197–203.

https://doi.org/10.1115/1.2792234

Published Online: September 1, 1997

View Article titled, Warpage and Interfacial Stress Distribution in a Single-Level Integrated Module (SLIM)

Topics: Stress concentration, Warping, Thermomechanics, Delamination, Design, Dielectric materials, Electronic components, Failure, Shear (Mechanics), Stress

Journal Articles

Thermal Stresses in Layered Electronic Assemblies

Z. Q. Jiang, Y. Huang, A. Chandra

J. Electron. Packag. June 1997, 119(2): 127–132.

https://doi.org/10.1115/1.2792218

Published Online: June 1, 1997

View Article titled, Thermal Stresses in Layered Electronic Assemblies

Topics: Thermal stresses, Adhesives, Design, Stress, Electronic packages, Electronics, Euler-Bernoulli beam theory, Failure, Finite element analysis, Finite element methods

Journal Articles

Stress Analysis of Printed Circuit Boards With Highly Populated Solder Joints and Components: A Micromechanics Approach

K. X. Hu, Y. Huang, C. P. Yeh, K. W. Wyatt

J. Electron. Packag. June 1996, 118(2): 87–93.

https://doi.org/10.1115/1.2792137

Published Online: June 1, 1996

View Article titled, Stress Analysis of Printed Circuit Boards With Highly Populated Solder Joints and Components: A Micromechanics Approach

Topics: Micromechanics (Engineering), Printed circuit boards, Solder joints, Stress analysis (Engineering), Lumber, Accounting, Composite materials, Energy budget (Physics), Finite element analysis, Stress concentration

Journal citation

NARROW

Effect of Design Parameters on Thermomechanical Stress in Silicon of Through-Silicon Via

Thermal Stresses of Through Silicon Vias and Si Chips in Three Dimensional System in Package

Evaluation of Joining Strength of Silicon-Resin Interface at a Vertex in a Three-Dimensional Joint Structure

The Thermoelastic Analysis of Chip-Substrate System

Characterization of Substrate Materials for System-in-a-Package Applications

Failure Analysis of Full Delamination on the Stacked Die Leaded Packages

Quantitative Mechanism of Significant Benefits of Underfill in Flip-Chip Assemblies

Strength Evaluation of Notch Structure for Semiconductor Encapsulant Resin

Experimental Investigation of Residual Stresses in Layered Materials Using Moire´ Interferometry

Three-Dimensional Versus Two-Dimensional Finite Element Modeling of Flip-Chip Packages

Interior Stress for Axisymmetric Abrasive Indentation in the Free Abrasive Machining Process: Slicing Silicon Wafers With Modern Wiresaw

Mesh Sensitivity and FEA for Multi-Layered Electronic Packaging

Package-to-Board Attach Reliability — Methodology and Case Study on OMPAC Package

Modeling Stresses of Contacts in Wire Saw Slicing of Polycrystalline and Crystalline Ingots: Application to Silicon Wafer Production

A Finite-Element and Experimental Analysis of Stress Distribution in Various Shear Tests for Solder Joints

Towards an Integrated Approach for Analysis and Design of Wafer Slicing by a Wire Saw

Residual Stress Analysis of Bimaterial Strips Under Multiple Thermal Loading

Warpage and Interfacial Stress Distribution in a Single-Level Integrated Module (SLIM)

Thermal Stresses in Layered Electronic Assemblies

Stress Analysis of Printed Circuit Boards With Highly Populated Solder Joints and Components: A Micromechanics Approach

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