Finite element modeling is widely used for estimating the solder joint reliability of electronic packages. In this study, the electronic package is a CSP mounted on a printed circuit board (PCB) using an area array of solder joints varying from 5×4 up to 7×7. An empirical model for estimating the reliability of CSP solder joints is derived by correlating the simulated strains to thermal cycling results for 20 different sample configurations. This empirical model translates the inelastic strains calculated by nonlinear three-dimensional (3D) finite element simulations into a reliability estimation (N50% or N100ppm). By comparing with the results of reliability tests, it can be concluded that this model is accurate and consistent for analyzing the effect of solder joint geometry. Afterwards, parameter sensitivity analysis was conducted by integrating a design of experiment (DOE) analysis with the reliable solder fatigue prediction models, following the method of simulation-based optimization. Several parameters are analyzed: the PCB parameters (elastic modulus, coefficient of thermal expansion, thickness), the chip dimensions (area array configuration), and the parameters defining the solder joint geometry (substrate and chip pad diameter, solder volume). The first study analyzes how the solder joint geometry influences the CSP reliability. A second study is a tolerance analysis for six parameters. These parameters can have a tolerance (=accuracy) of their nominal value, and it is shown that these small tolerances can have a significant influence on the solder joint reliability.

1.
Darveaux
,
R.
,
1988
, “
Constitutive Relations for Tin Based Solder Joints
,”
IEEE Trans. Compon., Hybrids, Manuf. Technol.
,
11
, pp.
284
290
.
2.
Wong
,
B.
,
1988
, “
A Creep-Rupture Model for Two-Phase Eutectic Solders
,”
IEEE Trans. Compon., Hybrids, Manuf. Technol.
,
11
, pp.
284
290
.
3.
Shine
,
M. C.
, and
Fox
,
L. R.
,
1987
, “
Fatigue of Solder Joints in Surface Mount Devices
,”
ASTM Spec. Tech. Publ.
,
942
, pp.
588
610
.
4.
Mei, Z., 1998, “FAIR—Fast Assessment of Interconnect Reliability,” in Proc. 48th Electronics Components and Technology Conference, pp. 268–276.
5.
Vandevelde, B., and Beyne, E., 2001, “Solder Parameter Sensitivity for CSP Life-Time Prediction Using Simulation-Based Optimization Method,” in Proceedings of the 51st Electronic Components and Technology Conference, 2001, Lake Buena Vista, Florida, USA, pp. 281–287.
6.
MARC MSC Software Handbook (finite element code).
7.
LMS Optimus Handbook.
8.
Zhang, G. Q., and Stehouwer, P., 2000, “Simulation-Based Optimization in Virtual Prototyping of Electronic Packaging,” in Proceeding of EuroSimE2000, Kluwer.
9.
Vandevelde, B., Beyne, E., Zhang, G. Q., and Caers, Jo, 2001, “Parametrized Modeling of Thermo-Mechanical Reliability,” in Proceedings of the 2nd Eurosime Conference, April 2001, Paris, France, pp. 49–54.
You do not currently have access to this content.