Microstructural evolution occurs in lead free Sn-Ag-Cu (SAC) solder joints exposed to isothermal aging. Such changes lead to degradations in the mechanical properties and creep behavior of the solder, and can result in dramatic reductions in the board level reliability of lead-free electronic assemblies subjected to aging. In our recent research, Scanning Electron Microscopy (SEM) has been used to: (1) monitor aging induced microstructural changes occurring within fixed regions in selected lead-free solder joints, (2) create time-lapse imagery of the microstructure evolution, and (3) analyze the microstructural changes quantitatively and correlate to the observed mechanical behavior evolution. This approach has removed the limitations of many prior studies where aged and non-aged microstructures were taken from two different samples and could only be qualitatively compared. In our current study, the microstructural evolutions were observed in SAC305 (96.5Sn-3.0Ag-0.5Cu) and SAC_Q (SAC+Bi) exposed to isothermal conditions at T = 100 °C and 125 °C for several different regions from several different joints. The microstructures in several fixed regions of interest were recorded after predetermined time intervals of aging, which were 1 hour (up to 270 hours) and 250 hours (up to 7000 hours) for the long-term aging samples. The aging induced changes in microstructure have been correlated with the changes in mechanical behavior measured using uniaxial tensile testing. The area and diameter of each IMC particle were tracked during the aging process using the recorded images and imaging processing software. As expected, the analysis of the evolving SAC305 and SAC+X microstructures showed a significant amount of diffusion of silver and bismuth in the beta-tin matrix during aging. In particular, Ag 3 Sn particles coalesced during aging leading to a decrease in the number of particles. Any bismuth in the SAC+X microstructure was observed to quickly go into solution, resulting in solid solution strengthening. This primary occurred within the beta-Sn dendrites, but also in the Ag 3 Sn intermetallic rich regions between dendrites. The presence of bismuth in was also found to slow the diffusion process that coarsens the Ag 3 Sn IMC particles. The combination solid solution strengthening and a lower diffusion rate for Ag lead to reduced aging effects in the SAC+Bi alloy relative to the SAC305 solder alloy. The SAC_Q alloy was found to have significantly better high temperature mechanical properties relative to SAC305 at all prior aging conditions. In particular, the initial modulus and ultimate tensile strength of SAC305 experienced large degradations during high temperature aging, whereas the same properties of SAC_Q changed only slightly. These changes in mechanical behavior correlated well with the observed increases in the average IMC particle diameter and decreases in the number of IMC particles. The microstructural and material property degradations were especially large for SAC305 during the initial 50 hours of aging.

Local heat transport in two Ga x In 1-x N/GaN-heterostructures on sapphire substrates is investigated by microscopic Raman imaging using two lasers of 532 nm (Raman observation) and 325 nm (heat generation and Raman observation), which enables the separation of heat generation and Raman observation positions. It is found that E 2 (high) and A 1 (LO) modes of the Ga 0.84 In 0.16 N layer exhibit mutually different characteristics, which indicates the analysis of the occupation of the A 1 (LO) mode is available. E 2 (high) mode of the GaN layer observed by the 532-nm laser reveals that the transport of the heat energy generated in the Ga 0.84 In 0.16 N layer to the GaN under layer is blocked in the high-density area of misfit dislocation in the vicinity of the heterointerface.

Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power (SWaP) of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current (DC) measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to sub-microsecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.

Traditionally, the printed circuit assemblies have been fabricated through a combination of imaging and plating based subtractive processes involving use of photo-exposure followed by baths for plating and etching to form the needed circuitry on rigid and flexible laminates. Additive electronics is finding applications for fabrication of IoT sensors. The emergence of a number of additive technologies poses an opportunity for the development of processes for manufacture of flexible substrates using mainstream additive processes, which are now commercially available. Aerosol-Jet printing has shown the capability for printing lines and spaces below 10 μm in width. The Aerosol-Jet system supports a wide variety of materials, including nanoparticle inks and screen-printing pastes, conductive polymers, insulators, adhesives, and even biological matter. The adoption of additive manufacturing for high-volume commercial fabrication requires an understanding of the print consistency, electrical and mechanical properties. Little literature exists that addresses the effect of varying sintering time and temperature on the shear strength and resistivity of the printed lines. In this study, the effect of process parameters on the resultant line-consistency, mechanical and electrical properties has been studied. Print process parameters studied include the sheath rate, mass flow rate, nozzle size, substrate temperature and chiller temperature. Properties include resistance and shear load to failure of the printed electrical line as a function of varying sintering time and varying sintering temperature. Aerosol-Jet machine has been used to print interconnects. Printed samples have been exposed to different sintering times and temperatures. The resistance and shear load to failure of the printed lines has been measured. The underlying physics of the resultant trend was then investigated using elemental analysis and SEM. The effect of line-consistency driftover prolonged runtimes has been measured for up to 10-hours of runtime. Printing process efficiency has been gauged a function of process capability index (Cpk) and process capability ratio (Cp). Printed samples were studied offline using optical Profilometry to analyze the consistency within the line width, line height, line resistance and shear load to study the variance in the electrical and mechanical properties over time.

Electromigration (EM) is the process of displacing atoms in metals due to current flow leading to interconnect failures in electronic circuits. As electronics feature sizes continue to shrink, EM is becoming an increasingly serious reliability concern. EM, in aluminum (Al) interconnects, has been studied previously, but typically on the device level using Black’s law [1], without emphasis on the localized heating and defect generation around the failure site. To better understand the local EM process, thermoreflectance (TR) thermal imaging technique is used to obtain temperature profiles with submicron resolution [2]. We show that a simple lifetime prediction using Black’s law is not possible for a micro Al wire having a patterned constriction. The wire fails at two distinct failure locations depending on the level of current excitation. Moreover, the lifetime dependence on ambient temperature was studied. Each failure location had its own extracted activation energy. Our findings suggest that Black’s law may be extended to local features. They also show the potential for the design of local features in extending the lifetime of metallic interconnects. In summary, the temperature profile with submicron spatial resolution offers a unique opportunity to better understand the different mechanisms contributing to EM failures which can be used to design highly reliable interconnects.

Thermal management has become more important as high-performance electronics have concentrated heat loads with current cooling technologies. This motivates the implementation of new cooling solutions to dissipate high heat levels from high-performance electronics. Evaporative cooling is one of the most promising approaches for meeting these future thermal demands. Thin-film evaporation promotes heat dissipation through the phase change process with minimal conduction resistance. In this process, it is important to design surface properties and structures that can minimize meniscus thickness, increase liquid-vapor interface area, and enhance evaporation performances. In this study, we thereby investigate thin-film evaporation by employing nanotextured copper substrates for varying thermal conditions. Specifically, we visualize the liquid spreading on the nanotextured surfaces using a high-speed imaging technique to quantify evaporative heat transfer for various designs. The permeability is calculated using an enhanced wicking model to account for the evaporation effect. The mass balance measurements allow us to calculate evaporation rates. Then, we employ infrared thermography to examine two-dimensional temporal temperature profiles of the samples during the evaporative wicking with a given heat flux. The combination of time-lapse images, evaporation rate measurements, and temperature profiles will provide a comprehensive understanding of evaporation performances of textured surfaces.

There are various designs for segregating hot and cold air in data centers such as cold aisle containment (CAC), hot aisle containment (HAC), and chimney exhaust rack. These containment systems have different characteristics and impose various conditions on the information technology equipment (ITE). One common issue in HAC systems is the pressure buildup inside the HAC (known as backpressure). Backpressure also can be present in CAC systems in case of airflow imbalances. Hot air recirculation, limited cooling airflow rate in servers, and reversed flow through ITE with weaker fan systems (e.g. network switches) are some known consequences of backpressure. Currently there is a lack of experimental data on the interdependency between overall performance of ITE and its internal design when a backpressure is imposed on ITE. In this paper, three commercial 2-rack unit (RU) servers with different internal designs from various generations and performance levels are tested and analyzed under various environmental conditions. Smoke tests and thermal imaging are implemented to study the airflow patterns inside the tested equipment. In addition, the impact leak of hot air into ITE on the fan speed and the power consumption of ITE is studied. Furthermore, the cause of the discrepancy between measured inlet temperatures by internal intelligent platform management interface (IPMI) and external sensors is investigated. It is found that arrangement of fans, segregation of space upstream and downstream of fans, leakage paths, location of sensors of baseboard management controller (BMC) and presence of backpressure can have a significant impact on ITE power and cooling efficiency.

The rapid growth of the global network infrastructure has resulted in a sharp increase in the number and size of data center facilities. Total data center power consumption now represents a significant fraction of global electricity production. To conserve natural resources, and to satisfy the cooling demands of compact, powerful electronics, thermal management strategies with high heat transfer coefficients must be employed. Two-phase liquid immersion cooling is one such strategy that has been gaining momentum in commercial cooling applications over recent years. The work discussed in this paper provides information on two different flow boiling investigations performed on vertically oriented surfaces in a small form factor server model. Two different types of surfaces — bare silicon, and silicon surfaces attached with microfinned heat sinks were tested in this study. Novec 649 dielectric fluid was used as the primary working fluid. The first investigation compares the thermal performance of parallel and impinging flow distribution systems, for different subcooling and flow rate conditions. The second investigation is on nucleation suppression in flow boiling for the parallel and impinging flow distribution systems. In this study, flow rates ranging from 0 ml/min to 1650 ml/min were tested and high-speed imaging was performed to capture the change in bubble characteristics. The resulting observations, including highest heat flux values supported without nucleation activity, are reported and discussed.

Field extracted electrical assemblies, subjected to harsh environments including storage, and transportation may have often sustained degradation in their material properties and physical structure, without exhibiting external signs of damage. The lack of macro-indicators of damage makes the quantification of sustained damage and the remaining useful life challenging for assessment of the reliability makes quantification of accrued damage and remaining useful life much difficult. The operation environment requires survivability under high-g loads often in excess of 10,000g-100,000g. The need of non-destructive test methods for determination of the internal damage and the assessment of expected operational reliability under the presence of accrued damage from prolonged storage is extremely desirable. While a number of non-destructive test methods such as x-ray, and acoustic imaging exist in the state-of-art — they are limited to the acquisition of imaging of the internal damage state without the ability of conducting measurement of deformation under the action of environment loads. There is scarcity of literature on studying progressive damage to the physical structure of fuze components when subjected to high g shocks. Previously, researchers have studied the reliability of fuze subjected to high-temperature and high-g mechanical shocks, measured redundancy and reliability of fuze electronics through prediction of failure rates and MTTF using MIL-HDBK-217F standard, and performed on fault diagnosis. In this paper, a full-field deformation measurement technique has been presented to monitor damage in key components of the fuze after exposure to multiple high G shocks. Fuze assembly has been subjected to 30,000g mechanical shock until failure. The fuze assembly is CT scanned at regular intervals and the scan data is compared to the pristine scan data to compute physical deformations and damage sustained during the mechanical shock event.

In this work, we investigate the thermal response of GaN PIN diodes grown on a sapphire substrate and compare the results to GaN PIN diodes grown on a free standing GaN substrate (FS-GaN). Until now, thermal characterization techniques have been developed to assess the temperature distribution across lateral devices. Raman thermometry has shown to accurately measure the temperature rise across the depth of the GaN layer. Implementing this technique to assess the temperature distribution across the depth of a vertical GaN device is more challenging since a volumetric depth average is measured. The use of TiO 2 nanoparticles is shown to overcome this issue and reduce the uncertainty in the peak temperature by probing a surface temperature on top of the device. For the sapphire substrate, an additional temperature rise of about 15 K was seen on the surface of the PIN diode as compared to the average in the bulk. While the steady state thermal measurements show an accurate estimation of the device’s peak temperature, the PIN diodes are normally operated under pulsed conditions and the thermal response of these devices under periodic joule heating must be assessed. A recently developed transient thermoreflectance imaging technique (TTI) is used in this study to monitor transient temperature rise and decay of top metal contact. Under the same biasing conditions, the FS-GaN PIN diode is found to result in less than half the temperature rise obtained by the sapphire substrate diode. Extracting time constants, a longer rise and decay is also observed in the sapphire substrate diode.

A key component of the MEMS cryogenic cooling systems we are developing is a MEMS compressor. Its function is to compress the refrigerants used in the cooling cycle. Layers of polyimide are stacked and patterned on a silicon wafer to create micro check-valves and a compression chamber over which a diaphragm is suspended. To achieve the high (4:1) pressure ratio needed for the refrigeration cycle, the polyimide diaphragm needs to be fabricated with minimal dead volume beneath it, hence the need for a sacrificial layer with thickness of 100–300 nm. The topography created by the check-valves and valve-seats makes atomic layer deposition (ALD) ideal due to its conformality. Furthermore, following sacrificial layer release, the inside of the compression chamber will also need to be coated with a hermetic moisture barrier layer to enable the device to operate at 4 atmospheres without leaking. ALD is therefore also ideal for the final internal coating because it does not require line-of-sight. Towards this end, we demonstrate here the concept of using ALD TiO 2 as a sacrificial layer to create a 5 mm × 5 mm × 20 m-thick polyimide membrane, suspended by ∼ 100–350 nm above a silicon wafer, followed by a second thinner ALD coating of the interior surfaces bounded by wafer and membrane. The air gap under the membrane, defined by the released sacrificial layer, was measured at about 130–370 nm using two independent methods: reflectometry, and FIB cross sectioning followed by SEM imaging of the air gap’s cross section. The membrane was removed from one chip and the thickness of the internal coating on the underlying silicon was measured with the reflectometer to be about 40 nm. We thus demonstrate the use of ALD TiO 2 as both a sacrificial layer for fabricating nanoscale gaps, as well as for coating nanoscale internal cavities and channels.

Ultrasound is increasingly in demand as a medical imaging tool and can be particularly beneficial in the field of intracardiac echocardiography (ICE). However, many challenges remain in the development of a 3D ultrasound imaging system. We have designed and fabricated a quad-ring capacitive micromachined ultrasound transducer (CMUT) for real-time, volumetric medical imaging. Each CMUT array is composed of four concentric, independent ring arrays, each operating at a different frequency, with 128 elements per ring. In this project, one ring will be used for imaging. A large (5mm diameter) lumen is available for delivering other devices, including high intensity focused ultrasound transducers for therapeutic applications or optical fibers for photoacoustic imaging. We address several challenges in developing a 3D imaging system. Through wafer vias are incorporated in the fabrication process for producing 2D CMUT arrays. Device integration with electronics is achieved through solder bumping the arrays, designing a flexible PCB, and flip chip bonding CMUT and ASICs to the flexible substrate. Finally, we describe a method for integrating the flex assembly into a catheter shaft. The package, once assembled, will be used for in-vivo open chest experiments.

Electronics products may often be exposed to high temperature during storage, operation and handling in addition to high strain rate transient dynamic loads during drop-impact. Electronics subjected to drop-impact, shock and vibration may experience strain rates of 1–100 per sec. There are no material properties available in published literature at high strain rate at elevated temperature. High temperature and vibrations can contribute to the failures of electronic system. The reliability of electronic products can be improved through a thorough understanding of the weakest link in the electronic systems which is the solder interconnects. The solder interconnects accrue damage much faster when subjected to Shock and vibration at elevated temperatures. There is lack of fundamental understanding of reliability of electronic systems subjected to thermal loads. Previous studies have showed the effect of high strain rates and thermal aging on the mechanical properties of leadfree alloys including elastic modulus and the ultimate tensile strength. Extended period of thermal aging has been shown to affect the mechanical properties of lead free alloys including elastic modulus and the ultimate tensile strength at low strain rates representative of thermal fatigue [Lee 2012, Motalab 2012]. Previously, the microstructure, mechanical response and failure behavior of leadfree solder alloys when subjected to elevated isothermal aging and/or thermal cycling [Darveaux 2005, Ding 2007, Pang 2004] have been measured. Pang [1998] has showed that young’s modulus and yield stress of Sn-Pb are highly depending on strain rate and temperature. The ANAND viscoplastic constitutive model has been widely used to describe the inelastic deformation behavior of solders in electronic components. Previously, Mechanical properties of lead-free alloys, at different high strain rates (10, 35, 50, 75 /sec) and elevated temperature (25 C-125 C) for pristine samples have been studied [Lall 2012 and Lall 2014]. Previous researchers [Suh 2007 and Jenq 2009] have determined the mechanical properties of SAC105 at very high strain rate (Above 1000 per sec) using compression testing. But there is no data available in published literature at high strain rate and at elevated temperature for aged conditions. In this study, mechanical properties of lead free SAC105 has been determined for high strain rate at elevated temperature for aged samples. Effect of aging on mechanical properties of SAC105 alloy a high strain rates has been studied. Stress-Strain curves have been plotted over a wide range of strain rates and temperatures for aged specimen. Experimental data for the aged specimen has been fit to the ANAND’s viscoplastic model. SAC105 leadfree alloys have been tested at strain rates of 10, 35, 50 and 75 per sec at various operating temperatures of 50°C, 75°C, 100°C and 125°C. The test samples were exposed to isothermal aging conditions at 50°C for different aging time (30, 60, and 120 Days) before testing. Full-field strain in the specimen have been measured using high speed imaging at frame rates up to 75,000 fps in combination with digital image correlation. The cross-head velocity has been measured prior-to, during, and after deformation to ensure the constancy of cross-head velocity.

As the microelectronics industry continues to advance the boundaries of size and performance, focus on the impact of systems packaging has risen to the forefront of design and material considerations. As interfaces are often constructed of multiple heterogeneous layers, interfacial delamination is an important failure mechanism to consider in microelectronic packaging. This failure is due to, among other factors, the stresses arising from high mismatches in coefficient of thermal expansion (CTE). Most work to date has focused on interfacial crack propagation under monotonic loading that is incurred during fabrication steps such as deposition or curing which occur at elevated temperatures and subsequent cooling to room temperature. This is an important design consideration but it is not sufficient as the operational life of these devices involve high numbers of heating and cooling cycles which result in crack propagation under fatigue loading. As such the study of fatigue effects on these interfaces is paramount to improving the lifetime of microelectronic devices as the field pushes towards both thinner and wider packages. One such exploration, which is the subject of this work, is to determine the interface incremental crack growth rate as it relates to cyclic loading. In this work, double cantilever beam (DCB) tests are performed at various stress ratios on samples with epoxy mold compound (EMC) atop a copper leadframe. For these tests, force versus displacement curves will be obtained. Given the small dimensions of the interfaces in question, it is desirable to develop a test methodology that does not require in-situ measurement of crack length. Thus, in these tests the compliance of the samples is determined from the force versus displacement curves and used to infer the progress of the crack through an indirect approach. The advantage of this method is that it does not require the observational measurement of the crack length potentially allowing crack monitoring absent any optical or imaging methods. Using the determined crack propagation rate with fatigue cycle under various loading conditions, a generalized fatigue crack propagation model will be developed for mold compound and copper interface, and such a model can be employed to assess packaging reliability in operating conditions.

Two-phase liquid-vapor flow field measurements of confined jet impingement with boiling are performed using time-resolved stereo particle image velocimetry (stereo-PIV). A single circular jet of water, impinges normally from a 3.75 mm-diameter orifice onto a submerged circular heat source at an orifice-to-target spacing of 4 jet diameters. The impinging jet outflow including the vapor generated at the heat source are confined between the jet orifice plate and the bottom test section wall. Fluorescent seeding particles (10 μm in diameter) and time-resolved PIV measurements (taken at a sampling rate of 750 Hz) allow for imaging of the instantaneous interactions between the liquid and vapor structures. Liquid-phase velocity vectors within the two-phase flow field (with high vapor fractions) are presented as a function of heat flux at jet Reynolds numbers of 5,000 and 15,000 and contrasted with single-phase flow. The time-resolved measurements are used to highlight the influence of the vapor phase on the liquid flow field. It is found that bubble formation effectively blocks the developing wall-jet flow on the heated surface. The resulting liquid flow field in the confinement gap is dominated by vapor motion rather than by the entrainment from the developing wall jet.

Thermal management problems in electronic packages have been a challenging problem due to increasing number of transistors in chips and reduction in product size. Thermal interface materials (TIM) help heat dissipation by reducing thermal contact resistance between chip and integrated heat spreader (IHS) and TIM quality is critical for effective removal of heat generated from the package. Therefore, identification of defects within TIM is required during package assembly process development. Imaging techniques such as computerized scanning acoustic microscopy (CSAM) and X-ray tomography are used as non-destructive testing techniques to identify TIM defects qualitatively. More recently, it was shown that IR thermography can be used as a qualitative means of identifying defects as well. Thermal diffusion tomography is a powerful alternative to those techniques due to its lower cost and ease of application. In this study, quantitative characterization of defects in TIM is presented using thermal diffusion tomography. The study is conducted considering a high density interconnect flip chip package that includes spreading effect due to different sized IHS and die. Defect size and location are detected analyzing the measured thermal response of electronic package by solving the resulting inverse problem by Levenberg-Marquardt algorithm as an image reconstruction technique.

In this paper we report on a field investigation into airflow management challenges in high density data centers. This field investigation has also served to validate laboratory investigations into high density air cooling issues. In data centers with significant power consumption, and consequently high cooling loads per rack, high volumes of room airflow are required to meet server cooling airflow requirements. These volumes of air can be difficult to deliver in raised floor hot aisle / cold aisle layouts. The velocity of the airflow is such that it creates a negative pressure near the bottom of the rack. This negative pressure entrains air from under and behind the rack, causing recirculation and warmer air being provided to the servers at the base of the rack. This can cause operational problems and server performance impacts. This phenomenon has been demonstrated in previous papers reporting on test data using particle imaging velocimetry (PIV) techniques. The current work validates those studies by looking at airflow, infrared thermography, and actual IT performance while the under rack recirculation flows are occurring. Additionally, we demonstrate significant improvement by employing rigorous airflow management practices. We also discuss the limitations of current CFD modeling, the majority of which does not have sufficient grid-wise resolution to capture the problem. Further we discuss typical operational conditions that have suppressed the problem (or perhaps the awareness of) to date. Finally, the paper recommends best practices to mitigate the problem in high density data centers.

The morphology of liquid-gas interfaces in adiabatic two-phase microchannel flow through a transparent acrylic microchannel of 500 μm × 500 μm square cross section is investigated. Water seeded with 0.5 μm-diameter fluorescent polystyrene particles is pumped through the channel, and the desired adiabatic two-phase flow regime is achieved through controlled air injection. The diagnostic technique relies on obtaining particle position data through epifluorescent imaging of the flow at excitation and emission wavelengths of 532 and 620 nm, respectively. The particle positions are then used to resolve interface locations to within ±2 μm in the viewing plane. This technique was previously demonstrated by the authors for a static meniscus in a capillary tube. The complete interface geometry between liquid and gas phases is obtained for operation in the annular flow regime by mapping the interface within individual focal planes at various depths within the channel. The diagnostic technique is shown to successfully locate and measure interfaces between transparent, immiscible fluids in a dynamic microchannel flow environment.

Thermal characterization is useful for identifying the cause of circuit failures. Unusually high local temperatures can occur due to unexpected and localized power dissipation in a particular device, which was not anticipated nor designed in the device. Unintended high temperatures may be the source of circuit damage or it might be caused by the failure itself, such as a tiny short-circuit. However, it is often difficult to obtain enough information about the physical structure and characteristics of the circuit to clearly identify the cause of the failure. The method we present here is an imaging technique with both thermal distribution and emission intensity superimposed on a single image. Thermoreflectance thermal imaging takes advantage of the differences in light reflectivity of the surface with a changing temperature. This relationship is quite linear in a typical temperature range of interest. Using 1300 nm wave length for the illuminating source, the metal circuitry of interest is directly observed through the almost transparent silicon substrate of a flip chip mounted device. With the same photo detecting imaging sensor, i.e. InGaAs junction array, the emission from the target device through the silicon substrate is also detected. If there are some local electron collisions, e.g. due to a current concentration at a defect or a tiny whisker, a localized excess energy by electron-electron collision yields the photon generation and emits an electromagnetic wave. The photons having a sufficient energy level at wavelength transparent to silicon, reach the photo detecting imaging sensor. With software processing and precise synchronization of the driving circuit, illumination, and imaging, we can separate the thermal signal from the emission and observe transient behavior on a nanosecond time scale. The time response is helpful in some cases to separate cause and effect. As an example, an unintended small short-circuit resulting from the fabrication process may be reproduced for a small number of samples. The emission would be observed first, followed by the thermal signal which propagates in time. Another example is for a circuit with low design margin, in this case only a single sample exhibits a difference between emission and/or thermal image while numbers of good samples are identical with respect to the emission and thermal image. This difference clearly indicates the location of a potential failure.

This paper presents the characterization of the crack growth rate of Sn-4.0wt.%Ag-0.5wt.%Cu (SAC405) solder joints under drop impact. Several actual ChipArray® BGA (CTBGA) packages were cross-sectioned, polished and used as the test vehicles. The ball drop tests were performed using a specially-designed tester. The drop impact from the drop ball induces bending in the PCB, which damages the solder joints. The crack lengths in the solder joints were measured after every five drops using microscope imaging. Crack growth rates were calculated from the test results. Insight into the crack growth rate in solder joints under drop impact is provided. The direct cyclic approach for low-cycle fatigue analysis in ABAQUS was used to simulate the crack growth in the solder joints.